Add a new compatible string for Exynos850, providing all HW specific
data, which enables Exynos PD support for this chip.
Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
---
drivers/soc/samsung/pm_domains.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index ec630a151247..795d8a9cd4b5 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -20,6 +20,8 @@
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
+#include <dt-bindings/power/samsung,exynos850-power.h>
+
/* Register offsets inside Power Domain area in PMU */
#define EXYNOS_PD_CONF 0x0
#define EXYNOS_PD_STATUS 0x4
@@ -132,6 +134,21 @@ static const struct exynos_pm_domain_config exynos5433_cfg = {
.local_pwr_cfg = 0xf,
};
+static const unsigned int exynos850_pd_offsets[] = {
+ [EXYNOS850_PD_HSI] = 0x1c80,
+ [EXYNOS850_PD_G3D] = 0x1d00,
+ [EXYNOS850_PD_MFCMSCL] = 0x1d80,
+ [EXYNOS850_PD_DPU] = 0x2000,
+ [EXYNOS850_PD_AUD] = 0x2080,
+ [EXYNOS850_PD_IS] = 0x2100,
+};
+
+static const struct exynos_pm_domain_config exynos850_cfg = {
+ .local_pwr_cfg = 0x1,
+ .pd_offsets = exynos850_pd_offsets,
+ .pd_offsets_num = ARRAY_SIZE(exynos850_pd_offsets),
+};
+
static const struct of_device_id exynos_pm_domain_of_match[] = {
{
.compatible = "samsung,exynos4210-pd",
@@ -139,6 +156,9 @@ static const struct of_device_id exynos_pm_domain_of_match[] = {
}, {
.compatible = "samsung,exynos5433-pd",
.data = &exynos5433_cfg,
+ }, {
+ .compatible = "samsung,exynos850-pd",
+ .data = &exynos850_cfg,
},
{ },
};
--
2.39.2
