Add missing G3D clock domain to Exynos850 SoC device tree.
Reviewed-by: Chanho Park <chanho61.park@xxxxxxxxxxx>
Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
---
Changes in v2:
- Rebased on top of most recent soc/for-next tree
- Added Chanho Park Reviewed-by tag
arch/arm64/boot/dts/exynos/exynos850.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
index a38fe5129937..d67e98120313 100644
--- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
@@ -245,6 +245,15 @@ cmu_peri: clock-controller@10030000 {
"dout_peri_uart", "dout_peri_ip";
};
+ cmu_g3d: clock-controller@11400000 {
+ compatible = "samsung,exynos850-cmu-g3d";
+ reg = <0x11400000 0x8000>;
+ #clock-cells = <1>;
+
+ clocks = <&oscclk>, <&cmu_top CLK_DOUT_G3D_SWITCH>;
+ clock-names = "oscclk", "dout_g3d_switch";
+ };
+
cmu_apm: clock-controller@11800000 {
compatible = "samsung,exynos850-cmu-apm";
reg = <0x11800000 0x8000>;
--
2.39.1
