On 1/30/23 13:45, Rasmus Villemoes wrote:
On 27/01/2023 12.30, Marek Vasut wrote:
On 1/27/23 12:04, Jagan Teki wrote:
Thanks, but that's exactly what I'm doing, and I don't see any
modification of imx8mp.dtsi in that branch. I'm basically looking for
help to do the equivalent of
88775338cd58 - arm64: dts: imx8mm: Add MIPI DSI pipeline
f964f67dd6ee - arm64: dts: imx8mm: Add eLCDIF node support
for imx8mp in order to test those patches on our boards (we have two
variants).
Marek, any help here, thanks.
Try attached patch.
Thanks. I removed the lcdif2 and ldb nodes I had added from Alexander's
patch (94e6197dadc9 in linux-next) in order to apply it. I get a couple
of errors during boot:
clk: /soc@0/bus@32c00000/mipi_dsi@32e60000: failed to reparent
media_apb to sys_pll1_266m: -22
and enabling a pr_debug in clk_core_set_parent_nolock() shows that this
is because
clk_core_set_parent_nolock: clk sys_pll1_266m can not be parent of clk
media_apb
Further, the mipi_dsi fails to probe due to
/soc@0/bus@32c00000/mipi_dsi@32e60000: failed to get
'samsung,burst-clock-frequency' property
All other .dtsi files seem to have those samsung,burst-clock-frequency
and samsung,esc-clock-frequency properties, so I suppose those should
also go into the imx8mp.dtsi and are not something that the board .dts
file should supply(?).
No, that samsung,esc-clock-frequency (should be some 10-20 MHz, based on
your panel/bridge) and samsung,burst-clock-frequency (that's the HS
clock) should go into board DT, as those are property of the attached
panel/bridge.
[There's also some differences between your patch and Alexander's
regarding the lcdif2 and ldb nodes, so while my lvds display still sorta
works, I get
fsl-ldb 32ec0000.blk-ctrl:lvds-ldb: Configured LDB clock (297000000
Hz) does not match requested LVDS clock: 346500000 Hz
and the image is oddly distorted/shifted. But I suppose that's
orthogonal to getting the lcdif1 -> mipi-dsi -> ... pipeline working.]
Alexander is right in the reply below, you have to configure the LVDS
serializer clock in DT and they must match LCDIF2 pixel clock which are
also configured in DT then, else you won't get the correct LVDS clock.
