On Tue, 9 Aug 2022 at 10:09, Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> wrote: > > On 08/08/2022 21:15, Sam Protsenko wrote: > > This patch series implements some missing Exynos850 clock domains. Right > > now those are mainly required for SysMMU clocks, although of course > > there is a lot of other clocks generated by those CMUs. > > > > Exynos850 has next SysMMU instances: > > - SYSMMU_AUD > > - SYSMMU_DPU > > - SYSMMU_IS0 > > - SYSMMU_IS1 > > - SYSMMU_MFCMSCL > > > > As CMU_DPU is already implemented, that leaves CMU_AUD, CMU_IS and > > CMU_MFCMSCL to be implemented, which is done in this series: > > - CMU_AUD: audio clocks > > - CMU_IS: camera clocks (Image Signal Processing) > > - CMU_MFCMSCL: multi-format codec and scaler clocks > > Please send a v2: > 1. Using proper output from get_maintainers.pl > 2. Using standard git send-email or any other equivalent method, so your > patchset is properly threaded. It's not possible to apply it otherwise. > See also: > https://lore.kernel.org/all/20220808181600.10491-1-semen.protsenko@xxxxxxxxxx/#t > Thanks, will do. Just wanted to avoid cluttering the "device tree" mailing list with actual driver changes. But obviously it's not a proper way. > > Best regards, > Krzysztof
