On 22. 5. 4. 16:51, Chanho Park wrote:
Add CMU_CORE clock which represents Core BUS clocks. The source clocks of this CMU block are oscclk or dout_clkcmu_core_bus. Thus, two source clocks should be provided via device tree. All the gate clocks are defined as CLK_IS_CRITICAL because they control(gate/ungate) core bus clocks but not been assigned to any drivers. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Signed-off-by: Chanho Park <chanho61.park@xxxxxxxxxxx> --- drivers/clk/samsung/clk-exynosautov9.c | 92 ++++++++++++++++++++++++++ 1 file changed, 92 insertions(+)
(snip) Acked-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx> -- Best Regards, Samsung Electronics Chanwoo Choi
