>-----Original Message----- >From: Marek Szyprowski [mailto:m.szyprowski@xxxxxxxxxxx] >Sent: Thursday, April 28, 2022 3:20 PM >To: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>; Lee Jones ><lee.jones@xxxxxxxxxx>; Rob Herring <robh+dt@xxxxxxxxxx>; Krzysztof >Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>; Alim Akhtar ><alim.akhtar@xxxxxxxxxxx>; Dinh Nguyen <dinguyen@xxxxxxxxxx>; Michal >Simek <michal.simek@xxxxxxxxxx>; Liviu Dudau <liviu.dudau@xxxxxxx>; >Sudeep Holla <sudeep.holla@xxxxxxx>; Lorenzo Pieralisi ><lorenzo.pieralisi@xxxxxxx>; Ray Jui <rjui@xxxxxxxxxxxx>; Scott Branden ><sbranden@xxxxxxxxxxxx>; Broadcom Kernel Team <bcm-kernel-feedback- >list@xxxxxxxxxxxx>; Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx>; >devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux- >samsung-soc@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx >Cc: Rob Herring <robh@xxxxxxxxxx> >Subject: Re: [PATCH 08/10] ARM: dts: exynos: use proper 'dma- >channels/requests' properties > >Hi Krzysztof, > >On 27.04.2022 17:58, Krzysztof Kozlowski wrote: >> pl330 DMA controller bindings documented 'dma-channels' and >> 'dma-requests' properties (without leading hash sign), so fix the DTS >> to match the bindings. >> >> Reported-by: Rob Herring <robh@xxxxxxxxxx> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> > >Are those properties really needed for PL330 driver on Exynos SoCs? I've >removed them and I still see the proper values read from registers and >reported in the log (Exynos4210): > >dma-pl330 12680000.dma-controller: Loaded driver for PL330 DMAC-141330 >dma-pl330 12680000.dma-controller: DBUFF-32x4bytes Num_Chans-8 >Num_Peri-32 Num_Events-32 >dma-pl330 12690000.dma-controller: Loaded driver for PL330 DMAC-141330 >dma-pl330 12690000.dma-controller: DBUFF-32x4bytes Num_Chans-8 >Num_Peri-32 Num_Events-32 >dma-pl330 12850000.dma-controller: Loaded driver for PL330 DMAC-141330 >dma-pl330 12850000.dma-controller: DBUFF-64x8bytes Num_Chans-8 >Num_Peri-1 Num_Events-32 > >I also don't see any code that would read those properties. IMHO they should >be simply removed at all, at least for the PL330 related nodes. > I thought these series is correcting the DMA binding error, however is DMA binding itself is broken then probably this need a relook. >> --- >> arch/arm/boot/dts/exynos3250.dtsi | 8 ++++---- >> arch/arm/boot/dts/exynos4.dtsi | 12 +++++------ >> .../boot/dts/exynos4210-universal_c210.dts | 4 ++-- >> arch/arm/boot/dts/exynos5250.dtsi | 16 +++++++-------- >> arch/arm/boot/dts/exynos5410.dtsi | 8 ++++---- >> arch/arm/boot/dts/exynos5420.dtsi | 20 +++++++++---------- >> 6 files changed, 34 insertions(+), 34 deletions(-) >> >> diff --git a/arch/arm/boot/dts/exynos3250.dtsi >> b/arch/arm/boot/dts/exynos3250.dtsi >> index 41bb421e67c2..7bdd4f0782c3 100644 >> --- a/arch/arm/boot/dts/exynos3250.dtsi >> +++ b/arch/arm/boot/dts/exynos3250.dtsi >> @@ -429,8 +429,8 @@ pdma0: dma-controller@12680000 { >> clocks = <&cmu CLK_PDMA0>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <32>; >> + dma-channels = <8>; >> + dma-requests = <32>; >> }; >> >> pdma1: dma-controller@12690000 { >> @@ -440,8 +440,8 @@ pdma1: dma-controller@12690000 { >> clocks = <&cmu CLK_PDMA1>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <32>; >> + dma-channels = <8>; >> + dma-requests = <32>; >> }; >> >> adc: adc@126c0000 { >> diff --git a/arch/arm/boot/dts/exynos4.dtsi >> b/arch/arm/boot/dts/exynos4.dtsi index 5fd17bc52321..2a244aaf84b4 >> 100644 >> --- a/arch/arm/boot/dts/exynos4.dtsi >> +++ b/arch/arm/boot/dts/exynos4.dtsi >> @@ -676,8 +676,8 @@ pdma0: dma-controller@12680000 { >> clocks = <&clock CLK_PDMA0>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <32>; >> + dma-channels = <8>; >> + dma-requests = <32>; >> }; >> >> pdma1: dma-controller@12690000 { >> @@ -687,8 +687,8 @@ pdma1: dma-controller@12690000 { >> clocks = <&clock CLK_PDMA1>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <32>; >> + dma-channels = <8>; >> + dma-requests = <32>; >> }; >> >> mdma1: dma-controller@12850000 { >> @@ -698,8 +698,8 @@ mdma1: dma-controller@12850000 { >> clocks = <&clock CLK_MDMA>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <1>; >> + dma-channels = <8>; >> + dma-requests = <1>; >> }; >> >> fimd: fimd@11c00000 { >> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts >> b/arch/arm/boot/dts/exynos4210-universal_c210.dts >> index 138d606d58a5..c1b11704b8ee 100644 >> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts >> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts >> @@ -666,8 +666,8 @@ mdma0: dma-controller@12840000 { >> clocks = <&clock CLK_MDMA>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <1>; >> + dma-channels = <8>; >> + dma-requests = <1>; >> power-domains = <&pd_lcd0>; >> }; >> }; >> diff --git a/arch/arm/boot/dts/exynos5250.dtsi >> b/arch/arm/boot/dts/exynos5250.dtsi >> index df80ddfada2d..c4c0b4c08094 100644 >> --- a/arch/arm/boot/dts/exynos5250.dtsi >> +++ b/arch/arm/boot/dts/exynos5250.dtsi >> @@ -700,8 +700,8 @@ pdma0: dma-controller@121a0000 { >> clocks = <&clock CLK_PDMA0>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <32>; >> + dma-channels = <8>; >> + dma-requests = <32>; >> }; >> >> pdma1: dma-controller@121b0000 { >> @@ -711,8 +711,8 @@ pdma1: dma-controller@121b0000 { >> clocks = <&clock CLK_PDMA1>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <32>; >> + dma-channels = <8>; >> + dma-requests = <32>; >> }; >> >> mdma0: dma-controller@10800000 { >> @@ -722,8 +722,8 @@ mdma0: dma-controller@10800000 { >> clocks = <&clock CLK_MDMA0>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <1>; >> + dma-channels = <8>; >> + dma-requests = <1>; >> }; >> >> mdma1: dma-controller@11c10000 { >> @@ -733,8 +733,8 @@ mdma1: dma-controller@11c10000 { >> clocks = <&clock CLK_MDMA1>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <1>; >> + dma-channels = <8>; >> + dma-requests = <1>; >> }; >> >> gsc_0: gsc@13e00000 { >> diff --git a/arch/arm/boot/dts/exynos5410.dtsi >> b/arch/arm/boot/dts/exynos5410.dtsi >> index 4d797a9abba4..6dc08cb0622c 100644 >> --- a/arch/arm/boot/dts/exynos5410.dtsi >> +++ b/arch/arm/boot/dts/exynos5410.dtsi >> @@ -196,8 +196,8 @@ pdma0: dma-controller@121a0000 { >> clocks = <&clock CLK_PDMA0>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <32>; >> + dma-channels = <8>; >> + dma-requests = <32>; >> }; >> >> pdma1: dma-controller@121b0000 { >> @@ -207,8 +207,8 @@ pdma1: dma-controller@121b0000 { >> clocks = <&clock CLK_PDMA1>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <32>; >> + dma-channels = <8>; >> + dma-requests = <32>; >> }; >> >> audi2s0: i2s@3830000 { >> diff --git a/arch/arm/boot/dts/exynos5420.dtsi >> b/arch/arm/boot/dts/exynos5420.dtsi >> index 21b608705049..08198d82ce8d 100644 >> --- a/arch/arm/boot/dts/exynos5420.dtsi >> +++ b/arch/arm/boot/dts/exynos5420.dtsi >> @@ -437,8 +437,8 @@ adma: dma-controller@3880000 { >> clocks = <&clock_audss EXYNOS_ADMA>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <6>; >> - #dma-requests = <16>; >> + dma-channels = <6>; >> + dma-requests = <16>; >> power-domains = <&mau_pd>; >> }; >> >> @@ -449,8 +449,8 @@ pdma0: dma-controller@121a0000 { >> clocks = <&clock CLK_PDMA0>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <32>; >> + dma-channels = <8>; >> + dma-requests = <32>; >> }; >> >> pdma1: dma-controller@121b0000 { >> @@ -460,8 +460,8 @@ pdma1: dma-controller@121b0000 { >> clocks = <&clock CLK_PDMA1>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <32>; >> + dma-channels = <8>; >> + dma-requests = <32>; >> }; >> >> mdma0: dma-controller@10800000 { >> @@ -471,8 +471,8 @@ mdma0: dma-controller@10800000 { >> clocks = <&clock CLK_MDMA0>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <1>; >> + dma-channels = <8>; >> + dma-requests = <1>; >> }; >> >> mdma1: dma-controller@11c10000 { >> @@ -482,8 +482,8 @@ mdma1: dma-controller@11c10000 { >> clocks = <&clock CLK_MDMA1>; >> clock-names = "apb_pclk"; >> #dma-cells = <1>; >> - #dma-channels = <8>; >> - #dma-requests = <1>; >> + dma-channels = <8>; >> + dma-requests = <1>; >> /* >> * MDMA1 can support both secure and non-secure >> * AXI transactions. When this is enabled in > >Best regards >-- >Marek Szyprowski, PhD >Samsung R&D Institute Poland
