On Fri, 11 Mar 2022 10:45:14 +0100, Vincent Whitchurch wrote: > Add a compatible for the UART on the ARTPEC-8 SoC. This hardware block > is closely related to the variants used on the Exynos chips. The > register layout is identical to Exynos850 et al but the fifo size is > different (64 bytes in each direction for all instances). > > Signed-off-by: Vincent Whitchurch <vincent.whitchurch@xxxxxxxx> > --- > > Notes: > v2: > - Expand commit message. > - Define required clocks. > > Documentation/devicetree/bindings/serial/samsung_uart.yaml | 2 ++ > 1 file changed, 2 insertions(+) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
