On 06/12/2021 16:31, David Virag wrote: > This is an initial implementation adding basic clocks, such as UART, > USI, I2C, WDT, ect. and their parent clocks. It is heavily based on the > Exynos850 clock driver at 'drivers/clk/samsung/clk-exynos850.c' which > was made by Sam Protsenko, thus the copyright and author lines were > kept. > > Bus clocks are enabled by default as well to avoid hangs while trying to > access CMU registers. > > Only the parts of CMU_TOP needed for CMU_CORE and CMU_PERI, a bit of > CMU_CORE, and most of CMU_PERI is implemented as of now. > > Signed-off-by: David Virag <virag.david003@xxxxxxxxx> > --- > Changes in v2: > - Use shared code between Exynos850 and 7885 clock drivers > - As the code that was from the Exynos850 clock driver was moved to > clk-exynos-arm64.c and what remains is mostly SoC specific data, > move the Linaro copyright and Sam Protsenko author lines there. > > Changes in v3: > - Nothing > > Changes in v4: > - Fixed missing headers > > drivers/clk/samsung/Makefile | 1 + > drivers/clk/samsung/clk-exynos7885.c | 597 +++++++++++++++++++++++++++ > 2 files changed, 598 insertions(+) > create mode 100644 drivers/clk/samsung/clk-exynos7885.c > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx> Best regards, Krzysztof
