On 30/11/2021 03:31, Sam Protsenko wrote: > On Tue, 30 Nov 2021 at 04:24, Sam Protsenko <semen.protsenko@xxxxxxxxxx> wrote: >> >> USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and >> provides selectable serial protocol (one of: UART, SPI, I2C). USIv2 >> registers usually reside in the same register map as a particular >> underlying protocol it implements, but have some particular offset. E.g. >> on Exynos850 the USI_UART has 0x13820000 base address, where UART >> registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc >> offsets. Desired protocol can be chosen via SW_CONF register from System >> Register block of the same domain as USI. >> >> Before starting to use a particular protocol, USIv2 must be configured >> properly: >> 1. Select protocol to be used via System Register >> 2. Clear "reset" flag in USI_CON >> 3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be >> disabled, so that the IP clock is not gated automatically); this is >> done using USI_OPTION register >> 4. Keep both USI clocks (PCLK and IPCLK) running during USI registers >> modification >> >> This driver implements above behavior. Of course, USIv2 driver should be >> probed before UART/I2C/SPI drivers. It can be achived by embedding >> UART/I2C/SPI nodes inside of USI node (in Device Tree); driver then >> walks underlying nodes and instantiates those. Driver also handles USI >> configuration on PM resume, as register contents can be lost during CPU >> suspend. >> >> This driver is designed with different USI versions in mind. So it >> should be relatively easy to add new USI revisions to it later. >> >> Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> >> --- > > I'm sorry for sending this v2 series as a bunch of separate mails. My > msmtp failed in the middle of submission, two times in a row. If it's > a bother, please tell me and I'll re-send as v3. > You can always fix it by using --in-reply-to and --no-thread. This unfortunately breaks b4, so please resend (can be v2 RESEND): Looking up https://lore.kernel.org/r/20211130022250.28519-1-semen.protsenko%40linaro.org Grabbing thread from lore.kernel.org/all/20211130022250.28519-1-semen.protsenko%40linaro.org/t.mbox.gz Analyzing 2 messages in the thread Checking attestation on all messages, may take a moment... ✓ [PATCH v2 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings ✓ Signed: DKIM/linaro.org ERROR: missing [2/5]! ERROR: missing [3/5]! ERROR: missing [4/5]! ERROR: missing [5/5]! Best regards, Krzysztof
