On 22.11.2021 00:27, Sam Protsenko wrote: > CMU_CMGP clock domain provides clocks for CMGP IP-core (Common GPIO). > CMGP module encapsulates next blocks: > - 8 GPIO lines > - 1 GPADC > - 2 USI blocks, each can be configured to provide one of > UART/SPI/HSI2C serial interfaces > > Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx> Applied, thanks.