On Wed, Oct 27, 2021 at 10:38:09AM +0200, Krzysztof Kozlowski wrote:
> On 21/10/2021 08:18, Youngmin Nam wrote:
> > Exynos MCT version 2 is composed of 1 FRC and 12 comparators.
> > The 12 comparators can produces interrupts independently,
> > so they can be used as local timer of each CPU.
> >
>
> ...
>
> > +
> > +static void exynos_mct_comp_start(struct mct_clock_event_device *mevt,
> > + bool periodic, unsigned long cycles)
> > +{
> > + unsigned int index = mevt->comp_index;
> > + unsigned int comp_enable;
> > + unsigned int loop_cnt = 0;
> > +
> > + comp_enable = readl_relaxed(reg_base + EXYNOS_MCT_COMP_ENABLE(index));
> > + if (comp_enable == MCT_COMP_ENABLE)
> > + exynos_mct_comp_stop(mevt);
> > +
> > + if (periodic)
> > + writel_relaxed(MCT_COMP_CIRCULAR_MODE, reg_base + EXYNOS_MCT_COMP_MODE(index));
> > +
> > + writel_relaxed(cycles, reg_base + EXYNOS_MCT_COMP_PERIOD(index));
>
> This is unsigned long, so 64-bit on your platform. Use writeq_relaxed or
> handle it somehow.
Thanks for your review.
I checked again and data sheet of MCTv2 shows compartor period has 32-bit data width.
Once we write 32bit value to comp_period register, H/W will produce interrupt when increasing FRC
is the same with the value of "current FRC + comp_period".
>
>
> Best regards,
> Krzysztof
>
