Re: [PATCH v3] clk: exynos7: Keep aclk_fsys1_200 enabled

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On 1/31/21 18:04, Paweł Chmiel wrote:
This clock must be always enabled to allow access to any registers in
fsys1 CMU. Until proper solution based on runtime PM is applied
(similar to what was done for Exynos5433), fix this by calling
clk_prepare_enable() directly from clock provider driver.

It was observed on Samsung Galaxy S6 device (based on Exynos7420), where
UFS module is probed before pmic used to power that device.
In this case defer probe was happening and that clock was disabled by
UFS driver, causing whole boot to hang on next CMU access.

Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@xxxxxxxxx>
---
Changes from v2:
   - Avoid __clk_lookup() call when enabling clock
Changes from v1:
   - Instead of marking clock as critical, enable it manually in driver.

Acked-by: Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx>



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