On Mon, 19 Oct 2020 at 12:12, Krzysztof Kozlowski <krzk@xxxxxxxxxx> wrote: > > On Mon, Oct 19, 2020 at 11:47:11AM +0200, Marek Szyprowski wrote: > > From: Jaehoon Chung <jh80.chung@xxxxxxxxxxx> > > > > Add dt-bindings for the Samsung Exynos PCIe controller (Exynos5433 > > variant). > > The title has typo and actually entire "Doc" should be dropped. Just > "dt-bindings: pci:". This applies to all DT patches. > > > > > Signed-off-by: Jaehoon Chung <jh80.chung@xxxxxxxxxxx> > > [mszyprow: updated the binding to latest driver changes, rewrote it in yaml, > > rewrote commit message] > > If you wrote them in YAML it should be a new patch of yours. It is the > same then as converting TXT to YAML. > > > Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx> > > --- > > .../bindings/pci/samsung,exynos-pcie.yaml | 106 ++++++++++++++++++ > > 1 file changed, 106 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml > > > > diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml > > new file mode 100644 > > index 000000000000..48fb569c238c > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml > > @@ -0,0 +1,104 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Samsung SoC series PCIe Host Controller Device Tree Bindings > > + > > +maintainers: > > + - Jaehoon Chung <jh80.chung@xxxxxxxxxxx> > > + > > +description: |+ > > + Exynos5433 SoC PCIe host controller is based on the Synopsys DesignWare > > + PCIe IP and thus inherits all the common properties defined in > > + designware-pcie.txt. > > + > > +allOf: > > + - $ref: /schemas/pci/pci-bus.yaml# > > + > > +properties: > > + compatible: > > + enum: > > + - samsung,exynos5433-pcie > > const, not enum > > > + > > + reg: > > + items: > > + - description: External Local Bus interface (ELBI) registers. > > + - description: Data Bus Interface (DBI) registers. > > + - description: PCIe configuration space region. > > + > > + reg-names: > > + items: > > + - const: elbi > > + - const: bdi > > + - const: config > > + > > + interrupts: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: PCIe bridge clock > > + - description: PCIe bus clock > > + > > + clock-names: > > + items: > > + - const: pcie > > + - const: pcie_bus > > + > > + phys: > > + maxItems: 1 > > + > > + phy-names: > > + const: pcie-phy > > + > > + vdd10-supply: > > + description: > > + Phandle to a regulator that provides 1.0V power to the PCIe block. > > + > > + vdd18-supply: > > + description: > > + Phandle to a regulator that provides 1.8V power to the PCIe block. > > + > > +required: > > + - reg > > + - reg-names > > + - interrupts > > + - interrupt-names > > + - clocks > > + - clock-names > > + - phys > > + - phy-names > > + - vdd10-supply > > additionalProperties: false This can be unevaluatedProperties, since you include pci-bus schema. However still you should either include designware schema or include it's properties here. Best regards, Krzysztof
