This patch adds DT bindings for Samsung ufs hci Reviewed-by: Rob Herring <robh@xxxxxxxxxx> Signed-off-by: Alim Akhtar <alim.akhtar@xxxxxxxxxxx> --- Hi Rob This is just a rebase on your's dt/next This patch was part of [1] [1] https://lkml.org/lkml/2020/5/27/1697 .../bindings/ufs/samsung,exynos-ufs.yaml | 89 +++++++++++++++++++ 1 file changed, 89 insertions(+) create mode 100644 Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml new file mode 100644 index 000000000000..38193975c9f1 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC series UFS host controller Device Tree Bindings + +maintainers: + - Alim Akhtar <alim.akhtar@xxxxxxxxxxx> + +description: | + Each Samsung UFS host controller instance should have its own node. + This binding define Samsung specific binding other then what is used + in the common ufshcd bindings + [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt + +properties: + + compatible: + enum: + - samsung,exynos7-ufs + + reg: + items: + - description: HCI register + - description: vendor specific register + - description: unipro register + - description: UFS protector register + + reg-names: + items: + - const: hci + - const: vs_hci + - const: unipro + - const: ufsp + + clocks: + items: + - description: ufs link core clock + - description: unipro main clock + + clock-names: + items: + - const: core_clk + - const: sclk_unipro_main + + interrupts: + maxItems: 1 + + phys: + maxItems: 1 + + phy-names: + const: ufs-phy + +required: + - compatible + - reg + - interrupts + - phys + - phy-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/exynos7-clk.h> + + ufs: ufs@15570000 { + compatible = "samsung,exynos7-ufs"; + reg = <0x15570000 0x100>, + <0x15570100 0x100>, + <0x15571000 0x200>, + <0x15572000 0x300>; + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock_fsys1 ACLK_UFS20_LINK>, + <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; + clock-names = "core_clk", "sclk_unipro_main"; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; + phys = <&ufs_phy>; + phy-names = "ufs-phy"; + }; +... base-commit: b3a9e3b9622ae10064826dccb4f7a52bd88c7407 prerequisite-patch-id: e0425bbe8f2aff3882b728a0caf0218b6b3e9b6e prerequisite-patch-id: c8c8502c512f9d6fdaf7d30e54dde3e68c3d855b prerequisite-patch-id: 8505df2fd70632150b50543cadc6fd7dd42d191c prerequisite-patch-id: 1a9701ab83425940c8aacb76737edb57ab815e47 prerequisite-patch-id: 7881e0b87f1f04f657d9e6d450fb5231ad6ffa1a prerequisite-patch-id: 01dbc0e550e3fcad6e525e7e3183f9f0312e8496 prerequisite-patch-id: ad801812fff960abab3f27d2c7383be9fd9aa439 prerequisite-patch-id: 65474c9540e6dc749d30223897de1f486d6b3843 prerequisite-patch-id: 64b58cd4c5ecfacf28fc20c31a6617092a1e1931 prerequisite-patch-id: 9bcdd2995fd3f6361f8d5e89c56645058ac9ff96 -- 2.17.1
