On Fri, Jun 12, 2020 at 02:58:37PM +0100, Guillaume Tucker wrote: > This "alert" error message can be seen on exynos4412-odroidx2: > > L2C: platform modifies aux control register: 0x02070000 -> 0x3e470001 > L2C: platform provided aux values permit register corruption. > > Followed by this plain error message: > > L2C-310: enabling full line of zeros but not enabled in Cortex-A9 > > To fix it, don't set the L310_AUX_CTRL_FULL_LINE_ZERO flag (bit 0) in > the default value of l2c_aux_val. It may instead be enabled when > applicable by the logic in l2c310_enable() if the attribute > "arm,full-line-zero-disable" was set in the device tree. > > The initial commit that introduced this default value was in v2.6.38: > > 1cf0eb799759 "ARM: S5PV310: Add L2 cache init function in cpu.c" > > However, the code to set the L310_AUX_CTRL_FULL_LINE_ZERO flag and > manage that feature was added much later and the default value was not > updated then. So this seems to have been a subtle oversight > especially since enabling it only in the cache and not in the A9 core > doesn't actually prevent the platform from running. According to the > TRM, the opposite would be a real issue, if the feature was enabled in > the A9 core but not in the cache controller. > > Reported-by: "kernelci.org bot" <bot@xxxxxxxxxxxx> > Signed-off-by: Guillaume Tucker <guillaume.tucker@xxxxxxxxxxxxx> > --- > arch/arm/mach-exynos/exynos.c | 2 +- Thanks, applied. Best regards, Krzysztof
