On 04.03.2020 15:37, Marek Szyprowski wrote:
> Recent changes in the SPI core and the SPI-GPIO driver revealed that the
> GPIO lines for the LD9040 LCD controller on the UniversalC210 board are
> defined incorrectly. Fix the polarity for those lines to match the old
> behavior and hardware requirements to fix LCD panel operation with
> recent kernels.
>
> CC: stable@xxxxxxxxxxxxxxx # 5.0+
> Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
Reviewed-by: Andrzej Hajda <a.hajda@xxxxxxxxxxx>
--
Regards
Andrzej
> ---
> arch/arm/boot/dts/exynos4210-universal_c210.dts | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index a1bdf7830a87..9dda6bdb9253 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -115,7 +115,7 @@
> gpio-sck = <&gpy3 1 GPIO_ACTIVE_HIGH>;
> gpio-mosi = <&gpy3 3 GPIO_ACTIVE_HIGH>;
> num-chipselects = <1>;
> - cs-gpios = <&gpy4 3 GPIO_ACTIVE_HIGH>;
> + cs-gpios = <&gpy4 3 GPIO_ACTIVE_LOW>;
>
> lcd@0 {
> compatible = "samsung,ld9040";
> @@ -124,8 +124,6 @@
> vci-supply = <&ldo17_reg>;
> reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>;
> spi-max-frequency = <1200000>;
> - spi-cpol;
> - spi-cpha;
> power-on-delay = <10>;
> reset-delay = <10>;
> panel-width-mm = <90>;
