On Wed, Aug 28, 2019 at 02:10:04PM +0200, Marek Szyprowski wrote: > All CortexA7/A15 based Exynos5 SoCs have ARM architected timers, so enable > support for them directly in the base dtsi. None of the known firmware > properly configures CNTFRQ arch timer register, so force clock frequency > to 24MHz, which is the only configuration supported by the remaining > clock drivers so far. > > Stock firmware for Peach Pit and Pi Chromebooks also doesn't reset > properly other arch timer registers, so add respective properties > indicating that. Other Exynos5-based boards behaves correctly in this area, > what finally allows to enable support for KVM-based virtualization. > > Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx> > --- > arch/arm/boot/dts/exynos5420-peach-pit.dts | 4 ++++ > arch/arm/boot/dts/exynos54xx.dtsi | 9 +++++++++ > arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 ++++ Thanks, applied. Best regards, Krzysztof
