On Wed, 17 Jul 2019 at 18:58, Lukasz Luba <l.luba@xxxxxxxxxxxxxxxxxxx> wrote: > > Hi Krzysztof, > > On 7/17/19 12:15 PM, Krzysztof Kozlowski wrote: > > On Mon, 15 Jul 2019 at 14:44, Lukasz Luba <l.luba@xxxxxxxxxxxxxxxxxxx> wrote: > >> > >> This is the most important bus in the Exynos5x SoC. The whole communication > >> inside SoC does through that bus (apart from direct requests from CCI to > >> DRAM controller). It is also modeled as a master bus in devfreq framework. > >> It is also the only one OPP table throughout other buses which has voltage > >> values. The devfreq software controls the speed of that bus and other > >> buses. The other buses follows the rate of the master. There is only one > >> regulator. The old lowest OPP had pair 925mV, 84MHz which is enough for > > > > s/lowest/slowest/ > please see below > > > >> this frequency. However, due to the fact that the other buses follows the > >> WCORE bus by taking the OPP from their table with the same id, e.g. opp02, > >> the children frequency should be stable with the set voltage. > >> It could cause random faults very hard to debug. > >> Thus, the patch removes the lowest OPP to make other buses' lowest OPPs > > > > s/lowest/slowest/ > Actually, I have double checked that, because we always used this > terminology: low OPP, high OPP, lower OPPs, higher OPPs. I can change > it here for you, but I think this is not something that people are used > to. Please check EAS pdf documentation or this file: > https://www.kernel.org/doc/Documentation/scheduler/sched-energy.txt > i.e. "running at a lower OPP" or "high OPPs", "lowest OPPs". Hmm, indeed, you're right. Don't change it then. Best regards, Krzysztof
