The PMU module of MALI400 GPU is optional and it looks that it is not
present on Exynos4210, because any access to its registers causes external
abort. This patch removes "pmu" interrupt for Exynos4210 SoCs, so the
driver will skip the PMU module. This fixes following fault during kernel
boot:
8<--- cut here ---
Unhandled fault: imprecise external abort (0x1406) at 0x00000000
pgd = (ptrval)
[00000000] *pgd=00000000
Internal error: : 1406 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.2.0-rc6-next-20190625-00005-g6fc2b61c64ab #6241
Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
PC is at lima_pmu_init+0x38/0x108
LR is at arm_heavy_mb+0x1c/0x38
pc : [<c059eb78>] lr : [<c011aa6c>] psr: 60000013
sp : d94c9da0 ip : d9000200 fp : d94bd070
r10: 00000001 r9 : 00000000 r8 : c1065aec
r7 : 00000000 r6 : 00000000 r5 : 00000000 r4 : d94bd070
r3 : e0932000 r2 : 0000ffff r1 : 00000000 r0 : d94bd070
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none
Control: 10c5387d Table: 4000404a DAC: 00000051
Process swapper/0 (pid: 1, stack limit = 0x(ptrval))
...
[<c059eb78>] (lima_pmu_init) from [<c059e6f8>] (lima_device_init+0x244/0x5a0)
[<c059e6f8>] (lima_device_init) from [<c059e40c>] (lima_pdev_probe+0x7c/0xd8)
[<c059e40c>] (lima_pdev_probe) from [<c05afcb8>] (platform_drv_probe+0x48/0x9c)
[<c05afcb8>] (platform_drv_probe) from [<c05ad594>] (really_probe+0x1c4/0x400)
[<c05ad594>] (really_probe) from [<c05ad988>] (driver_probe_device+0x78/0x1b8)
[<c05ad988>] (driver_probe_device) from [<c05add30>] (device_driver_attach+0x58/0x60)
[<c05add30>] (device_driver_attach) from [<c05ade34>] (__driver_attach+0xfc/0x160)
[<c05ade34>] (__driver_attach) from [<c05ab650>] (bus_for_each_dev+0x68/0xb4)
[<c05ab650>] (bus_for_each_dev) from [<c05ac734>] (bus_add_driver+0x104/0x20c)
[<c05ac734>] (bus_add_driver) from [<c05aece0>] (driver_register+0x78/0x10c)
[<c05aece0>] (driver_register) from [<c0103214>] (do_one_initcall+0x8c/0x430)
[<c0103214>] (do_one_initcall) from [<c0f01328>] (kernel_init_freeable+0x3c8/0x4d0)
[<c0f01328>] (kernel_init_freeable) from [<c0ac3aa0>] (kernel_init+0x8/0x10c)
[<c0ac3aa0>] (kernel_init) from [<c01010b4>] (ret_from_fork+0x14/0x20)
Exception stack(0xd94c9fb0 to 0xd94c9ff8)
...
---[ end trace 96ddc2a2879732ab ]---
The PMU module seems to work fine on Exynos4412 SoCs, so the patch also
moves the interrupt definitions to exynos4210.dtsi and exynos4412.dtsi
respectively, to keep only the common part in exynos4.dtsi.
Fixes: 13efd80acaa4 ("ARM: dts: exynos: Add GPU/Mali 400 node to Exynos4")
Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
---
arch/arm/boot/dts/exynos4.dtsi | 22 ----------------------
arch/arm/boot/dts/exynos4210.dtsi | 20 ++++++++++++++++++++
arch/arm/boot/dts/exynos4412.dtsi | 22 ++++++++++++++++++++++
3 files changed, 42 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 6005cfbbed89..7863a21a7a64 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -54,28 +54,6 @@
gpu: gpu@13000000 {
compatible = "samsung,exynos4210-mali", "arm,mali-400";
reg = <0x13000000 0x10000>;
- interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gp",
- "gpmmu",
- "pp0",
- "ppmmu0",
- "pp1",
- "ppmmu1",
- "pp2",
- "ppmmu2",
- "pp3",
- "ppmmu3",
- "pmu";
/*
* CLK_G3D is not actually bus clock but a IP-level clock.
* The bus clock is not described in hardware manual.
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 6122da368092..f220716239db 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -450,6 +450,26 @@
};
&gpu {
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gp",
+ "gpmmu",
+ "pp0",
+ "ppmmu0",
+ "pp1",
+ "ppmmu1",
+ "pp2",
+ "ppmmu2",
+ "pp3",
+ "ppmmu3";
operating-points-v2 = <&gpu_opp_table>;
gpu_opp_table: opp_table {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 7bed6842575a..d20db2dfe8e2 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -717,6 +717,28 @@
};
&gpu {
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gp",
+ "gpmmu",
+ "pp0",
+ "ppmmu0",
+ "pp1",
+ "ppmmu1",
+ "pp2",
+ "ppmmu2",
+ "pp3",
+ "ppmmu3",
+ "pmu";
operating-points-v2 = <&gpu_opp_table>;
gpu_opp_table: opp_table {
--
2.17.1
