On 20.06.2018 20:28, Krzysztof Kozlowski wrote:
> On Tue, May 15, 2018 at 02:12:39PM +0200, Andrzej Hajda wrote:
>> OF graph describes USB data lanes between USB-PHY and respective MUIC.
>> Since graph is present and DWC driver can use it to get extcon, obsolete
>> extcon property can be removed.
>>
>> Signed-off-by: Andrzej Hajda <a.hajda@xxxxxxxxxxx>
>> ---
>> .../dts/exynos/exynos5433-tm2-common.dtsi | 19 ++++++++++++++++++-
>> 1 file changed, 18 insertions(+), 1 deletion(-)
> dtc W=1 now complains with:
> ===
> Warning (graph_child_address):
> /soc/hsi2c@14d90000/max77843@66/max77843-muic/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
> ===
>
> Do you plan to add more ports soon?
There could be a link between UART and MUIC, it could be beneficial for
the platform - there is no point to feed UART with data when UART output
is muxed-out by MUIC.
So I plan to investigate it but this is not on my short list :)
Alternatively one can create graphs without using it atm.
Regards
Andrzej
>
> Best regards,
> Krzysztof
>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
>> index 03453b822093..042e5894a138 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
>> @@ -868,6 +868,18 @@
>> };
>> };
>> };
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> + muic_to_usb: endpoint {
>> + remote-endpoint = <&usb_to_muic>;
>> + };
>> + };
>> + };
>> };
>>
>> regulators {
>> @@ -1287,12 +1299,17 @@
>>
>> &usbdrd_dwc3 {
>> dr_mode = "otg";
>> - extcon = <&muic>;
>> };
>>
>> &usbdrd30_phy {
>> vbus-supply = <&safeout1_reg>;
>> status = "okay";
>> +
>> + port {
>> + usb_to_muic: endpoint {
>> + remote-endpoint = <&muic_to_usb>;
>> + };
>> + };
>> };
>>
>> &xxti {
>> --
>> 2.17.0
>>
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