Since commit 2164a476205ccc ("usb: dwc3: set SUSPHY bit for all cores"),
the USB ports on odroid-XU4 don't work anymore.
Inserting an usb key (USB2.0) on the USB3.0 port result in:
[ 64.488264] xhci-hcd xhci-hcd.2.auto: Port resume took longer than 20000 msec, port status = 0xc400fe3
[ 74.568156] xhci-hcd xhci-hcd.2.auto: xHCI host not responding to stop endpoint command.
[ 74.574806] xhci-hcd xhci-hcd.2.auto: Assuming host is dying, halting host.
[ 74.601970] xhci-hcd xhci-hcd.2.auto: HC died; cleaning up
[ 74.606276] usb 3-1: USB disconnect, device number 2
[ 74.613565] usb 4-1: USB disconnect, device number 2
[ 74.621208] usb usb3-port1: couldn't allocate usb_device
NB: it's not related to USB2.0 devices, I get the same result with an USB3.0 device (SATA to USB3 for instance).
NB2: it doesn't happen on an odriod-XU3 board, that doesn't have the realtek RTL8153 chip.
If the lines:
if (dwc->revision > DWC3_REVISION_194A)
reg |= DWC3_GUSB3PIPECTL_SUSPHY;
are commented out, the USB3.0 start working.
For a full analyse: https://lkml.org/lkml/2017/1/18/678
Felipe suggested that suspend should be disabled temporarily while
what's wrong with DCW3 is figured out.
Tested on Odroid XU4
Suggested-by: Felipe Balbi <felipe.balbi@xxxxxxxxxxxxxxx>
Tested-by: Richard Genoud <richard.genoud@xxxxxxxxx>
Signed-off-by: Richard Genoud <richard.genoud@xxxxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx # 4.4+
Fixes: 2164a476205ccc ("usb: dwc3: set SUSPHY bit for all cores")
---
arch/arm/boot/dts/exynos5422-odroidxu4.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
index 2faf88627a48..f62dbd9b5ad3 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
@@ -43,6 +43,15 @@
status = "okay";
};
+&usbdrd_dwc3_0 {
+ /*
+ * without that, usb devices are not recognized when
+ * they are plugged.
+ * cf: https://lkml.org/lkml/2017/1/18/678
+ */
+ snps,dis_u3_susphy_quirk;
+};
+
&usbdrd_dwc3_1 {
dr_mode = "host";
};
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