On Thu, Nov 07, 2013 at 10:39:37AM +0100, Tomasz Figa wrote: > On Thursday 07 of November 2013 14:52:36 Rajeshwari Birje wrote: > > The reordering of the words is taken care by the Swap configuration > > (swap_cfg) register, which I have set for both 16 and 32 bits_per_word > > case. I have tested this patch and works fine for me and also has > > improved the timing performance. > This driver seems to have already worked fine with 32 bits per word, > using the s5c73m3 camera sensor, which uses SPI for firmware upload. This is all sounding very confused. Either this patch is a bug fix or it's breaking the driver but I can't tell without more information about what it's supposed to do. Can someone explain in concrete terms what the intended effect of the patch is on wire behaviour? It is possible that the s5c73m3 driver is buggy here if it's only been tested with the s3c64xx driver (which seems likely) since the author could have worked around the driver behaviour.
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