On Tue, Nov 5, 2013 at 3:29 PM, Tushar Behera <tushar.behera@xxxxxxxxxx> wrote:
> On 31 October 2013 21:46, Lee Jones <lee.jones@xxxxxxxxxx> wrote:
>> On Thu, 31 Oct 2013, Tushar Behera wrote:
>>
>>> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
>>> supported by s2mps11-clk driver.
>>>
>>> Signed-off-by: Tushar Behera <tushar.behera@xxxxxxxxxx>
>>> CC: Lee Jones <lee.jones@xxxxxxxxxx>
>>> ---
>>> drivers/mfd/sec-core.c | 4 +++-
>>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
>>> index 34c18fb..020b86b 100644
>>> --- a/drivers/mfd/sec-core.c
>>> +++ b/drivers/mfd/sec-core.c
>>> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = {
>>> .name = "s5m8767-pmic",
>>> }, {
>>> .name = "s5m-rtc",
>>> - },
>>> + }, {
>>> + .name = "s5m8767-clk",
Do you want to handle these as "clock"? previous time, it's
implemented at regulator. please see drivers/regulator/max* series.
Thank you,
Kyungmin Park
>>> + }
>>> };
>>>
>>> static struct mfd_cell s2mps11_devs[] = {
>>
>> Acked-by: Lee Jones <lee.jones@xxxxxxxxxx>
>>
>
> Thanks.
>
>> I'd prefer to take this patch in via the MFD tree once you have
>> support from the other maintainers for the set.
>>
>
> Ok. I will let you know once I get the clock patches through.
>
> --
> Tushar Behera
>
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