Hi Rahul,
On Monday 26 of August 2013 15:08:21 Rahul Sharma wrote:
> Adding information about clocks to the binding documentation
> for exynos mixer and hdmi.
>
> Signed-off-by: Rahul Sharma <rahul.sharma@xxxxxxxxxxx>
> ---
> Documentation/devicetree/bindings/video/exynos_hdmi.txt | 14
> +++++++++++++- Documentation/devicetree/bindings/video/exynos_mixer.txt
> | 4 ++++ 2 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
> b/Documentation/devicetree/bindings/video/exynos_hdmi.txt index
> 323983b..94aaa7d 100644
> --- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
> +++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
> @@ -12,7 +12,19 @@ Required properties:
> a) phandle of the gpio controller node.
> b) pin number within the gpio controller.
> c) optional flags and pull up/down.
> -
> +- clocks: list of clock IDs from SoC clock driver.
> + a) hdmi: It is required for gate operation on aclk_200_disp1 clock
> + which clocks the display1 block.
Isn't aclk_200_disp1 a name specific to Exynos5 SoCs? AFAIK this binding
is also used for other SoCs, including Exynos4 and probably S5PV210, so it
should be written to either be SoC-agnostic or account for all supported
SoCs. What about following descriptions:
Gate of HDMI IP block bus clock.
> + b) sclk_hdmi: It is required for gate operation on sclk_hdmi clock
> + which clocks hdmi IP.
Gate of HDMI special clock.
> + c) sclk_pixel: Parent for mux mout_hdmi.
Pixel special clock, one of two possible inputs of HDMI clock mux.
> + d) sclk_hdmiphy: Parent for mux mout_hdmi.
HDMI PHY clock output, one of two possible inputs of HDMI clock mux.
> + e) mout_hdmi: It is required by the driver to switch between the 2
> + parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is
stable
> + after configuration, parent is set to sclk_hdmiphy else
> + sclk_pixel.
HDMI clock mux, used to select between clock generated by HDMI PHY and
alternative clock source that can be used until HDMI PHY is set up.
> +- clock-names: aliases as per driver requirements for above clock IDs:
> + "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".
> Example:
>
> hdmi {
> diff --git a/Documentation/devicetree/bindings/video/exynos_mixer.txt
> b/Documentation/devicetree/bindings/video/exynos_mixer.txt index
> 3334b0a..94b40b6 100644
> --- a/Documentation/devicetree/bindings/video/exynos_mixer.txt
> +++ b/Documentation/devicetree/bindings/video/exynos_mixer.txt
> @@ -10,6 +10,10 @@ Required properties:
> - reg: physical base address of the mixer and length of memory mapped
> region.
> - interrupts: interrupt number to the cpu.
> +- clocks: list of clock IDs from SoC clock driver.
> + a) mixer: It is required for gate operation on aclk_200_disp1
clock
Gate of Mixer IP bus clock.
> + which clocks the display1 block.
> + b) sclk_hdmi: Parent for mux mout_mixer.
I'm not sure why this clock is needed here. Could you explain what role it
plays in functioning of the Mixer IP?
Best regards,
Tomasz
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