Adds display timing node for a DP panel to Arndale Board DTS file
Signed-off-by: Vikas Sajjan <vikas.sajjan@xxxxxxxxxx>
---
arch/arm/boot/dts/exynos5250-arndale.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index f68b820..c831a5c 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -459,4 +459,20 @@
samsung,lane-count = <4>;
};
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing@0 {
+ /* 2560x1600 DP panel */
+ clock-frequency = <50000>;
+ hactive = <2560>;
+ vactive = <1600>;
+ hfront-porch = <48>;
+ hback-porch = <80>;
+ hsync-len = <32>;
+ vback-porch = <16>;
+ vfront-porch = <8>;
+ vsync-len = <6>;
+ };
+ };
+
};
--
1.7.9.5
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