Hi Sachin, On Friday 19 of April 2013 11:46:06 Sachin Kamat wrote: > Added clock entries for thermal management unit (TMU) for > Exynos4 SoCs. > > Signed-off-by: Sachin Kamat <sachin.kamat@xxxxxxxxxx> > Cc: Thomas Abraham <thomas.abraham@xxxxxxxxxx> > Cc: Mike Turquette <mturquette@xxxxxxxxxx> > --- > Should be applied on top of the below patches: > https://patchwork.kernel.org/patch/2448711/ > https://patchwork.kernel.org/patch/2459831/ > --- > .../devicetree/bindings/clock/exynos4-clock.txt | 1 + > drivers/clk/samsung/clk-exynos4.c | 4 +++- > 2 files changed, 4 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt > b/Documentation/devicetree/bindings/clock/exynos4-clock.txt index > 14d5c2a..5b17c4d 100644 > --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt > +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt > @@ -236,6 +236,7 @@ Exynos4 SoC and this is specified where applicable. > spi0_isp_sclk 380 Exynos4x12 > spi1_isp_sclk 381 Exynos4x12 > uart_isp_sclk 382 Exynos4x12 > + tmu 383 Documentation specifies this clock as "tmu_apbif". I think we should keep our clock names consistent with documentation. > > [Mux Clocks] > > diff --git a/drivers/clk/samsung/clk-exynos4.c > b/drivers/clk/samsung/clk-exynos4.c index 09cf161..fc4f662 100644 > --- a/drivers/clk/samsung/clk-exynos4.c > +++ b/drivers/clk/samsung/clk-exynos4.c > @@ -170,7 +170,7 @@ enum exynos4_clks { > gicisp, smmu_isp, smmu_drc, smmu_fd, smmu_lite0, smmu_lite1, mcuctl_isp, > mpwm_isp, i2c0_isp, i2c1_isp, mtcadc_isp, pwm_isp, wdt_isp, uart_isp, > asyncaxim, smmu_ispcx, spi0_isp, spi1_isp, pwm_isp_sclk, spi0_isp_sclk, > - spi1_isp_sclk, uart_isp_sclk, > + spi1_isp_sclk, uart_isp_sclk, tmu, > > /* mux clocks */ > mout_fimc0 = 384, mout_fimc1, mout_fimc2, mout_fimc3, mout_cam0, > @@ -815,6 +815,7 @@ static struct samsung_gate_clock exynos4210_gate_clks[] > __initdata = { GATE_A(keyif, "keyif", "aclk100", E4210_GATE_IP_PERIR, 16, > 0, 0, "keypad"), GATE_DA(sclk_fimd1, "exynos4-fb.1", "sclk_fimd1", > "div_fimd1", > E4210_SRC_MASK_LCD1, 0, CLK_SET_RATE_PARENT, 0, "sclk_fimd"), > + GATE(tmu, "tmu", "aclk100", E4210_GATE_IP_PERIR, 17, 0, 0), > }; > > /* list of gate clocks supported in exynos4x12 soc */ > @@ -915,6 +916,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] > __initdata = { GATE(spi1_isp, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13, > CLK_IGNORE_UNUSED, 0), > GATE(g2d, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0), > + GATE(tmu, "tmu", "aclk100", E4X12_GATE_IP_PERIR, 17, 0, 0), > }; > > #ifdef CONFIG_OF Btw. Lukasz Majewski have a complete series of patches to fix device tree support of TMU on Exynos4x12 and it includes changes to Exynos clock driver as well, with proper clock name. He will be sending it soon. Would you mind if we use his patch instead? Best regards, -- Tomasz Figa Samsung Poland R&D Center SW Solution Development, Kernel and System Framework -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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