Tomasz Figa wrote: > > This patch modifies pin control groups of SD pins on Exynos4210 and > Exynos4x12 to use drive strength 3, which corresponds to > S5P_GPIO_DRVSTR_LV4 in legacy non-DT code. > Well, the value of drive strength depends on board not SoC. So if required, it should be moved to board DT stuff. BTW, we can use the value as a default...I need to think about that again for exynos4210 and 4x12. Thanks. Best regards, Kgene. -- Kukjin Kim <kgene.kim@xxxxxxxxxxx>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. > This is needed at least on Origen board for sdhci2 to work. > > Signed-off-by: Tomasz Figa <t.figa@xxxxxxxxxxx> > Signed-off-by: Kyungmin Park <kyungmin.park@xxxxxxxxxxx> > --- > arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 56 +++++++++++++++----------- > ----- > arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 56 +++++++++++++++----------- > ----- > 2 files changed, 56 insertions(+), 56 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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