On 01/31/12 23:32, Will Deacon wrote:
On Tue, Jan 31, 2012 at 02:21:28PM +0000, Kukjin Kim wrote:
On 01/31/12 23:13, Will Deacon wrote:
This doesn't belong in smp.c but, more importantly, this doesn't work for
multi-cluster configurations at all. Since all A15 implementations will be
on new platforms, the code will be device-tree only and so we should use
Why not? As I know, current arm kernel ARMv7 arch can support A15
without device-tree. And you know, the core number should be counted by
L2 control register. no?
I'll answer these in order:
Hmm, let
1.) The code doesn't belong in smp.c because it's specific to the A15
Yes, agree. So I just commented in my patch, I'm not sure where it
should be added at.
2.) The architecture code may well support A15, but since there are no
platforms in mainline that support A15 yet, then all new platforms will
need to be DT-based. That means we can rely on the DT to provide this
information.
Well, I will submit EXYNOS5 which has two A15 cores today and I don't
know why it should be supported only with DT, EXYNOS5 DT supporting will
be submitted though.
3.) The L2 control register only tells you how many cores are hanging off
that particular L2. This will be wrong for multi-cluster systems since
it will only identify a subset of the cores.
OK, let me check it.
I believe Lorenzo posted some patches which you could look at.
OK, Would be better.
Yes, I think it's the only way to solve this problem without adding an
architected method for enumerating the CPU topology.
I'm not sure it is the only way...
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@xxxxxxxxxxx>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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