Hello,
Did you intentionally omit uart:0? Then, why uart:0 clock is not being
registered while other uart clocks are?
On Wed, Aug 18, 2010 at 11:01 PM, Kukjin Kim <kgene.kim@xxxxxxxxxxx> wrote:
> From: Jongpill Lee <boyko.lee@xxxxxxxxxxx>
>
> This patch adds uart clocks for S5PV310/S5PC210.
>
> Signed-off-by: Jongpill Lee <boyko.lee@xxxxxxxxxxx>
> Signed-off-by: Kukjin Kim <kgene.kim@xxxxxxxxxxx>
> ---
> arch/arm/mach-s5pv310/clock.c | 37 +++++++++++++++++++++++++++++++------
> 1 files changed, 31 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c
> index 8728504..843f4d0 100644
> --- a/arch/arm/mach-s5pv310/clock.c
> +++ b/arch/arm/mach-s5pv310/clock.c
> @@ -61,6 +61,11 @@ static int s5pv310_clk_ip_fsys_ctrl(struct clk *clk, int enable)
> return s5p_gatectrl(S5P_CLKGATE_IP_FSYS, clk, enable);
> }
>
> +static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable)
> +{
> + return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable);
> +}
> +
> /* Core list of CMU_CPU side */
>
> static struct clksrc_clk clk_mout_apll = {
> @@ -257,11 +262,6 @@ static struct clksrc_clk clk_sclk_vpll = {
> .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 },
> };
>
> -static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable)
> -{
> - return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable);
> -}
> -
> static struct clk init_clocks_disable[] = {
> {
> .name = "timers",
> @@ -303,7 +303,32 @@ static struct clk init_clocks_disable[] = {
> };
>
> static struct clk init_clocks[] = {
> - /* Nothing here yet */
> + {
> + .name = "uart",
> + .id = 1,
> + .enable = s5pv310_clk_ip_peril_ctrl,
> + .ctrlbit = (1 << 1),
> + }, {
> + .name = "uart",
> + .id = 2,
> + .enable = s5pv310_clk_ip_peril_ctrl,
> + .ctrlbit = (1 << 2),
> + }, {
> + .name = "uart",
> + .id = 3,
> + .enable = s5pv310_clk_ip_peril_ctrl,
> + .ctrlbit = (1 << 3),
> + }, {
> + .name = "uart",
> + .id = 4,
> + .enable = s5pv310_clk_ip_peril_ctrl,
> + .ctrlbit = (1 << 4),
> + }, {
> + .name = "uart",
> + .id = 5,
> + .enable = s5pv310_clk_ip_peril_ctrl,
> + .ctrlbit = (1 << 5),
> + }
> };
>
> static struct clk *clkset_group_list[] = {
> --
> 1.6.2.5
>
>
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>
--
MyungJoo Ham, Ph.D.
Mobile Software Platform Lab,
Digital Media and Communications (DMC) Business
Samsung Electronics
cell: 82-10-6714-2858
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