> The two architectures that define CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
> (powerpc and x86) now both define NET_IP_ALIGN as 0, so there is no
> need for this optimisation any more.
Hmmm.... even on x86 there will be a measurable cost
in misaligned accesses - at least for some workloads.
If the DMA is able to write to a mis-aligned buffer and
still perform aligned burst transfers mid-frame then
4n+2 aligning the rx buffer should be a win even on x86.
Note to hardware engineers: add an option to write two
bytes of junk before the rx data :-)
David
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