Re: [PATCH] rtc: pcf85063: do a SW reset after rtc power fail

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Hello Alexandre!

Thank you for your review!

On Thu, 2024-02-29 at 23:08 +0100, Alexandre Belloni wrote:
> > "There is a low probability that some devices will have corruption of the
> > registers after the automatic power-on reset if the device is powered up
> > with a residual VDD level. It is required that the VDD starts at zero volts

...

> Doing this in probe is putting a band-aid on a wooden leg as you are not
> guaranteed you will have a probe to catch this case. This should be
> rather done in pcf85063_rtc_set_time but it comes with its own set of

As I read the datasheet (quoted above) the device has "peculiarities" in
Power-On-Reset implementation, namely it's not always detected. In our
applications (and probably most other designs) it's the startup of Linux
with driver probe, which immediately follows the Power-On event
(which had some residue voltage because of large capacitors, whatsoever).

It is an issue we really observed and solved in 100% cases for our design.
I just thought it might be useful for others because it's also documented
by NXP. Maybe not as separate errata document and it's a bit hidden in
datasheet but I'd ultimately consider it a POR errata.

-- 
Alexander Sverdlin
Siemens AG
www.siemens.com




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