Hi again! On 1/14/2025 11:28 AM, Mike Galbraith wrote: [...]
This seems rather odd, one core diddling memory is the worst case. Any arm experts out there know why that would be? pi5, locked at 2.4GHz: taskset -c 3 stress -m 1 --vm-bytes 1G --vm-stride 16 --vm-keep --timeout 60s;killall cyclictest T: 0 (23157) P:99 I:1000 C: 63421 Min: 1 Act: 12 Avg: 27 Max: 1378 T: 1 (23158) P:99 I:1500 C: 42327 Min: 1 Act: 32 Avg: 29 Max: 1734 T: 2 (23159) P:99 I:2000 C: 31744 Min: 1 Act: 18 Avg: 28 Max: 1353 T: 3 (23160) P:99 I:2500 C: 25393 Min: 1 Act: 11 Avg: 6 Max: 39 With all cores diddling ram, things are far from lovely, but cyclictest wakeup latency improves drastically. As you increase the number of diddlers 1 -> 4, the latency numbers improve until you get all the way up to.. merely awful. stress -m 4 --vm-bytes 1G --vm-stride 16 --vm-keep --timeout 60s;killall cyclictest T: 0 (23276) P:99 I:1000 C: 62706 Min: 1 Act: 49 Avg: 48 Max: 220 T: 1 (23277) P:99 I:1500 C: 41800 Min: 1 Act: 53 Avg: 62 Max: 274 T: 2 (23278) P:99 I:2000 C: 31348 Min: 1 Act: 45 Avg: 65 Max: 302 T: 3 (23279) P:99 I:2500 C: 25077 Min: 1 Act: 32 Avg: 54 Max: 175
[...] I wonder if there is still a way to save the day, i.e. use the RPI5 as a somewhat capable RT-system by 1. making sure that the RT load does not do anything nasty - this is mostly under the users' control since they can setup their RT load to not do this. 2. preventing other tasks on the system from trashing the memory bus. These are not under direct control by the users if they wish to run a general purpose Linux system besides the RT load. Is there any mechanism in the Linux kernel to achieve 2.? This would probably come with significant slowdown of the non-RT tasks, but that would be acceptable at least for me. Kind regards, FPS -- https://blog.dfdx.eu
