On Tue, Aug 22, 2017 at 8:45 AM, afzal mohammed <afzal.mohd.ma@xxxxxxxxx> wrote: > If a PWM IP is present on the chip, won't updating the PWM compare > registers within 10us (PWM @100KHz) achieve the required ?, toggling > delay & jitter shouldn't be a worry here, right ? (assuming PWM > compare registers can be updated every 10us using hrtimers) > There is timers on the cpu that can generate a PWM in hardware, but what we need to do is update the PWM duty cycle every 10us (so the PWM freq will be say 1MHz). The idea is to ramp up/down the PWM value over time (waveform generation). I suppose if we could somehow feed the capture/compare registers with DMA, that might work. Gives me an idea -- we should look into audio hardware and see if any of that can generate a 100KHz waveform. Cliff -- ================= http://bec-systems.com -- To unsubscribe from this list: send the line "unsubscribe linux-rt-users" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
