On Fri, Jun 14, 2013 at 6:04 PM, Sebastian Andrzej Siewior <bigeasy@xxxxxxxxxxxxx> wrote: > On 06/09/2013 01:45 PM, Carsten Emde wrote: >> Invalidating and flushing all caches may introduce long latencies of up >> to several milliseconds. Do not execute it in PREEMPT_RT_FULL kernels, >> warn once instead and propose to pin all GPU renderering tasks to a >> single CPU, if possible. >> >> Original commit: >> 25ff1195f8a0b3724541ae7bbe331b4296de9c06 upstream. >> >> Original log: >> In order to fully serialize access to the fenced region and the update >> to the fence register we need to take extreme measures on SNB+, and >> manually flush writes to memory prior to writing the fence register in >> conjunction with the memory barriers placed around the register write. >> >> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> >> Signed-off-by: Carsten Emde <C.Emde@xxxxxxxxx> > > Oh boy. > > Chris, I have a few questions: > - is the wbinvd() required even on the local CPU or just the remote? > According to bugzilla non-smp works fine. If so, you open code > wbinvd_on_all_cpus() > - is it possible to replace the wbinvd() with clflush() ? -next has an extended version of this w/a where we also bang a special register after the wbinvd - the current one isn't good enough on baytrail platforms. Thus far we haven't found anything less offensive that still works (hey, we've started with machine_stop!), but we're working together with hw engineers trying to figure out what's going on. > - is the problem going away if every process doing graphics is pinned > to single CPU and the wbindv() call is avoided? Yep, the issue only happens when threads migrate while they're accessing tiled buffers thru the gtt. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- To unsubscribe from this list: send the line "unsubscribe linux-rt-users" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
