On Sun, Jun 9, 2013 at 1:45 PM, Carsten Emde <C.Emde@xxxxxxxxx> wrote: > Invalidating and flushing all caches may introduce long latencies of up > to several milliseconds. Do not execute it in PREEMPT_RT_FULL kernels, > warn once instead and propose to pin all GPU renderering tasks to a > single CPU, if possible. > > Original commit: > 25ff1195f8a0b3724541ae7bbe331b4296de9c06 upstream. > > Original log: > In order to fully serialize access to the fenced region and the update > to the fence register we need to take extreme measures on SNB+, and > manually flush writes to memory prior to writing the fence register in > conjunction with the memory barriers placed around the register write. > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Signed-off-by: Carsten Emde <C.Emde@xxxxxxxxx> This fixes the problem for me on 3.6.11.5-rt37. Thanks, Carsten! Christoph -- To unsubscribe from this list: send the line "unsubscribe linux-rt-users" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
