[RFC] [PATCH] powerpc Re: [announce] IBM RT Test Cases v.0.3

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Hello Darren Hart,

At Fri, 20 Jul 2007 15:40:58 -0700, Darren Hart wrote:
> Please download the tarball, give the updated documentation a cursory glance 
> and give them a go on your -rt system.  Please post your experience here as 
> well as any questions or problems you may run into.

This patch adds powerpc version of rdtscll() macro which actually reads
the timebase register and powerpc version of atomic_inc() to compile.
Compile and run tested on a Celleb (a powerpc64 machine).

Comments and suggestions are welcome.

By the way, would you mind if I use and/or refer to your test
results found at http://www.kernel.org/pub/linux/kernel/people/dvhart/ols2007/ to compare with the results taken on powerpc?  I'm going to present
the test results at the ELC/E2007 (Embedded Linux Conference Europe;
http://www.celinux.org/elc_europe07/elc_europe_index.html).

thanks for your understanding!
-- owa
Corprate Software Engineering Center, TOSHIBA

diff -rup rt-test-0.3.org/func/async_handler/async_handler_tsc.c rt-test-0.3/func/async_handler/async_handler_tsc.c
--- rt-test-0.3.org/func/async_handler/async_handler_tsc.c	2007-07-21 00:32:57.000000000 +0900
+++ rt-test-0.3/func/async_handler/async_handler_tsc.c	2007-10-17 19:55:34.000000000 +0900
@@ -65,6 +65,16 @@ pthread_mutex_t mutex;
 		__asm__ __volatile__ ("rdtsc" : "=a" (low), "=d" (high)); \
 		val = (uint64_t)high << 32 | low;	\
 	} while(0)
+#elif defined(__powerpc__)	/* 32bit version */
+#define rdtscll(val)							\
+	 do {								\
+		uint32_t tbhi, tblo ;					\
+		__asm__ __volatile__ ("mftbu %0" : "=r" (tbhi));	\
+		__asm__ __volatile__ ("mftbl %0" : "=r" (tblo));	\
+		val = 1000 * ((uint64_t) tbhi << 32) | tblo;		\
+	} while(0)
+#else
+#error
 #endif
 
 /* return difference in microseconds */
diff -rup rt-test-0.3.org/func/measurement/preempt_timing.c rt-test-0.3/func/measurement/preempt_timing.c
--- rt-test-0.3.org/func/measurement/preempt_timing.c	2007-07-21 00:32:56.000000000 +0900
+++ rt-test-0.3/func/measurement/preempt_timing.c	2007-10-17 19:56:56.000000000 +0900
@@ -50,6 +50,16 @@
 		 __asm__ __volatile__ ("rdtsc" : "=a" (low), "=d" (high)); \
 		val = (uint64_t)high << 32 | low;	\
 	} while(0)
+#elif defined(__powerpc__)	/* 32bit version */
+#define rdtscll(val)							\
+	 do {								\
+		uint32_t tbhi, tblo ;					\
+		__asm__ __volatile__ ("mftbu %0" : "=r" (tbhi));	\
+		__asm__ __volatile__ ("mftbl %0" : "=r" (tblo));	\
+		val = 1000 * ((uint64_t) tbhi <<32) | tblo;		\
+	} while(0)
+#else
+#error
 #endif
 
 #define ITERATIONS 1000000ULL
diff -rup rt-test-0.3.org/func/measurement/rdtsc-latency.c rt-test-0.3/func/measurement/rdtsc-latency.c
--- rt-test-0.3.org/func/measurement/rdtsc-latency.c	2007-07-21 00:32:56.000000000 +0900
+++ rt-test-0.3/func/measurement/rdtsc-latency.c	2007-10-17 19:57:31.000000000 +0900
@@ -42,6 +42,16 @@
 		__asm__ __volatile__ ("rdtsc" : "=a" (low), "=d" (high)); \
 		val = (uint64_t)high << 32 | low;	\
 	} while(0)
+#elif defined(__powerpc__)	/* 32 bit version */
+#define rdtscll(val)							\
+	 do {								\
+		uint32_t tbhi, tblo ;					\
+		__asm__ __volatile__ ("mftbu %0" : "=r" (tbhi));	\
+		__asm__ __volatile__ ("mftbl %0" : "=r" (tblo));	\
+		val = 1000 * ((uint64_t) tbhi <<32) | tblo;		\
+	} while(0)
+#else
+#error
 #endif
 
 /* return difference in nanoseconds */
diff -rup rt-test-0.3.org/include/librt.h rt-test-0.3/include/librt.h
--- rt-test-0.3.org/include/librt.h	2007-07-21 00:32:56.000000000 +0900
+++ rt-test-0.3/include/librt.h	2007-10-16 18:19:08.000000000 +0900
@@ -92,6 +92,7 @@ extern int _dbg_lvl;
  */
 static inline int atomic_add(int i, atomic_t *v)
 {
+#if defined(__x86_64__) || defined(__i386__)
 	int __i;
 	__i = i;
 	asm volatile(
@@ -99,6 +100,26 @@ static inline int atomic_add(int i, atom
 			:"=r"(i)
 			:"m"(v->counter), "0"(i));
 	return i + __i;
+
+#elif defined(__powerpc__)
+#define ISYNC_ON_SMP	"\n\tisync\n"
+#define LWSYNC_ON_SMP	__stringify(LWSYNC) "\n"
+	int t;
+	asm volatile(
+"	lwsync \n\
+1:	lwarx   %0,0,%2		# atomic_add_return	\n\
+	add     %0,%1,%0\n\
+	stwcx.  %0,0,%2 \n\
+	bne-    1b"
+	ISYNC_ON_SMP
+ 	: "=&r" (t)
+	: "r" (i), "r" (&v->counter)
+	: "cc", "memory");
+
+	return t;
+#else
+#error
+#endif
 }
 /* atomic_inc: atomically increment the integer passed by reference
  */
-
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