On 2018/2/28 2:28, Vicente Bergas wrote:
> Reference clock is needed for pcie_phy, not pcie controller.
> Actually pcie_phy doesn't need this since rk3399 clock driver
> already take care of this.
>
> Signed-off-by: Vicente Bergas <vicencb at gmail.com>
> Suggested-by: Shawn Lin <shawn.lin at rock-chips.com>
> ---
> arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
> index 4d47150d6862..3d7179aba3fb 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
> @@ -195,9 +195,6 @@
> };
>
> &pcie0 {
> - assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
> - assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
> - assigned-clock-rates = <100000000>;
> ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
> num-lanes = <4>;
> pinctrl-names = "default";
>
Reviewed-by: Shawn Lin <shawn.lin at rock-chips.com>
