Am Dienstag, 23. Mai 2017, 10:42:27 CEST schrieb Heiko Stuebner: > Am Montag, 22. Mai 2017, 09:20:59 CEST schrieb Shawn Lin: > > Hi Heiko, > > > > ? 2017/5/19 19:53, Heiko Stuebner ??: > > > Hi Shawn, > > > > > > Am Dienstag, 16. Mai 2017, 14:30:40 CEST schrieb Shawn Lin: > > >> In order to support multiple hierarchy of PCIe buses, > > >> for instance, PCIe switch, we need to extent bus-ranges > > >> to as max as possible. We have 32 regions and could support > > >> up to 31 buses except bus 0 for our root bridge. > > >> > > >> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com> > > > > > > can these 2 patches really be independent? > > > > yes, they are sloving two different issues, so I think > > they could be applied as-is. > > > > For patch 1, we was trying to ask PCI core to scan more > > buses as possible, otherwise it now only scan one, which > > isn't enough for PCIe switch chip. > > > > And before patch 2, we only allocated limited regions for > > devices attached to our root bridge, so we will fail to enable > > some devices if they ask more memory resource. > > ok, applied both for 4.13 just saw, that you may want to remember to include more people in devicetree patches ... especially the linux-arm-kernel at lists.infradead.org list. Doesn't hinder this patchset, but worth remembering for future series. Heiko
