Kever On Thu, Oct 9, 2014 at 9:50 PM, Kever Yang <kever.yang at rock-chips.com> wrote: > This patch add 400MHz and 500MHz to clock rate table for rk3288. > > Signed-off-by: Kever Yang <kever.yang at rock-chips.com> > --- > > Changes in v2: > - change the PLL setting of 400M to meet the constraints of TRM > > drivers/clk/rockchip/clk-rk3288.c | 2 ++ > 1 file changed, 2 insertions(+) Thanks! These numbers for 400MHz look better. Reviewed-by: Doug Anderson <dianders at chromium.org> Tested-by: Doug Anderson <dianders at chromium.org>