Hi Geert, On Fri, Jan 3, 2025 at 5:08 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > On Thu, Jan 2, 2025 at 7:18 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > > Replace manual bit manipulation in `BUS_MSTOP` with `FIELD_PREP_CONST` and > > `FIELD_GET` macros for better clarity and maintainability. Introduce > > explicit masks (`BUS_MSTOP_IDX_MASK`, `BUS_MSTOP_BITS_MASK`) to improve > > readability. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > > --- > > v2->v3 > > - Dropped unnecessary parentheses > > - Included RB tag from Geert > > Thanks, will queue in renesas-clk for v6.14, with > > --- a/drivers/clk/renesas/rzv2h-cpg.h > +++ b/drivers/clk/renesas/rzv2h-cpg.h > @@ -8,6 +8,8 @@ > #ifndef __RENESAS_RZV2H_CPG_H__ > #define __RENESAS_RZV2H_CPG_H__ > > +#include <linux/bitfield.h> > + > /** > * struct ddiv - Structure for dynamic switching divider > * > Thanks for taking care of this. Cheers, Prabhakar
