RE: [PATCH 1/3] memory: renesas-rpc-if: Use Hi-Z state as the default setting for IOVF pins

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Hi Krzysztof Kozlowski, Michael,

Gentle ping. Are you happy with this patch? or do you have different opinion?

This patch is based on RFC discussion [1]

[1] RFC: https://lore.kernel.org/all/c9b0cffbb1566a7d38f2251ac7c8883a@xxxxxxxx/

Cheers,
Biju

> -----Original Message-----
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Sent: Wednesday, July 3, 2024 3:59 PM
> To: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> Cc: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>; Geert Uytterhoeven <geert+renesas@xxxxxxxxx>; Michael Walle
> <michael@xxxxxxxx>; Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>; biju.das.au
> <biju.das.au@xxxxxxxxx>; linux-renesas-soc@xxxxxxxxxxxxxxx
> Subject: [PATCH 1/3] memory: renesas-rpc-if: Use Hi-Z state as the default setting for IOVF pins
> 
> The RZ/{G2L,G2LC,V2L} SMARC EVK uses Micron MT25QU412A flash and RZ/G2UL SMARC EVK uses Renesas
> AT25QL128A flash. With current pin setting for IOVF pin, 4-bit flash write fails for AT25QL128A flash.
> Use Hi-Z state as the default for IOVF pin, so that spi controller driver in linux will be independent
> of flash type.
> 
> To support this, during board production, the bit 4 of the NV config register must be cleared by the
> bootloader for Micron flash.
> 
> Output from u-boot after clearing bit4 of NVCR register.
> => renesas_micron_flash_nvcr
> SF: Detected mt25qu512a with page size 256 Bytes, erase size 64 KiB, total 64 MiB NVCR=0xef
> 
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> RFC->v1:
>  * New patch.
> ---
>  drivers/memory/renesas-rpc-if.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/memory/renesas-rpc-if.c b/drivers/memory/renesas-rpc-if.c index
> 3167826b236a..7fbd36fa1a1b 100644
> --- a/drivers/memory/renesas-rpc-if.c
> +++ b/drivers/memory/renesas-rpc-if.c
> @@ -367,7 +367,7 @@ int rpcif_hw_init(struct device *dev, bool hyperflash)
>  		regmap_update_bits(rpc->regmap, RPCIF_CMNCR,
>  				   RPCIF_CMNCR_MOIIO(3) | RPCIF_CMNCR_IOFV(3) |
>  				   RPCIF_CMNCR_BSZ(3),
> -				   RPCIF_CMNCR_MOIIO(1) | RPCIF_CMNCR_IOFV(2) |
> +				   RPCIF_CMNCR_MOIIO(1) | RPCIF_CMNCR_IOFV(3) |
>  				   RPCIF_CMNCR_BSZ(hyperflash ? 1 : 0));
>  	else
>  		regmap_update_bits(rpc->regmap, RPCIF_CMNCR,
> --
> 2.43.0






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