For devices in the RZ/G2L family, we have so far relied on U-Boot
correctly configuring the Ethernet interfaces in RGMII mode with
PVDD=1.8V before the kernel is booted. Instead, the required
configuration should be described in the device tree and activated
within the pinctrl driver.
Changes v2->v3:
* Picked up Linus W's Acked-by tags & Geert's Reviewed-by tags.
* Renamed rzg3s oen functions to match the callback names.
* Check pin caps before calling oen_{read,write}() so we can drop the
caps argument to those functions.
* Simplify arguments to rzg{2l,3s}_pin_to_oen_bit() and decode
required variables inside this function.
* Check for dedicated pin before calling RZG2L_PIN_ID_TO_{PORT,PIN}()
in rzg3s_pin_to_oen_bit().
Changes v1->v2:
* Rebased on next-20240611.
* Changed the approach taken in the pinctrl patches to be compatible
with changes made by Prabhakar for RZ/V2H support. I haven't picked
up Reviewed-by tags on these patches as they've changed a lot.
* Clarified that patch 6/9 also affects RZ/Five.
* No major changes to the dts patches so I've picked up Geert's
Reviewed-by tags for these.
Paul Barker (9):
pinctrl: renesas: rzg2l: Clarify OEN read/write support
pinctrl: renesas: rzg2l: Clean up and refactor OEN read/write
functions
pinctrl: renesas: rzg2l: Support output enable on RZ/G2L
arm64: dts: renesas: rzg2l: Enable Ethernet TXC output
arm64: dts: renesas: rzg2lc: Enable Ethernet TXC output
arm64: dts: renesas: rzg2ul: Enable Ethernet TXC output
arm64: dts: renesas: rzg2l: Set Ethernet PVDD to 1.8V
arm64: dts: renesas: rzg2lc: Set Ethernet PVDD to 1.8V
arm64: dts: renesas: rzg2ul: Set Ethernet PVDD to 1.8V
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 86 ++++++----
.../boot/dts/renesas/rzg2lc-smarc-som.dtsi | 43 +++--
.../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 86 ++++++----
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 155 ++++++++++++------
4 files changed, 237 insertions(+), 133 deletions(-)
--
2.39.2
