Hi Wolfram and Geert, On the RZ/V2H SoC for the SDHI IP block we have SD_STATUS register (page 1503 in [0]) which has a SD_IOVS bit that controls SDmIOVS pin. SDmIOVS is a multiplexed pin when '0' is written to SD_IOVS bit the pin state will be '0' and when '1' is written the pin state is '1'. So instead of a GPIO pin acting as regulator this SDmIOVS can be used to toggle 0/1 which will control the pmic to allow us for switching between 1.8V and 3.3V. There is a similar instance of regulator driver [1] which is controlled via register bit write, but in our case the SD_STATUS register is part of the SDHI IP block itself. What approach would you suggest in this case? [0] https://www.renesas.com/us/en/document/mah/rzv2h-group-users-manual-hardware?r=25471761 [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml Cheers, Prabhakar
