Hi Shimoda-san,
On Thu, Feb 29, 2024 at 1:07 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> Add PCIe Host and Endpoint nodes for R-Car V4H (R8A779G0).
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> @@ -723,6 +737,126 @@ hscif3: serial@e66a0000 {
> status = "disabled";
> };
>
> + pciec0: pcie@e65d0000 {
> + compatible = "renesas,r8a779g0-pcie",
> + "renesas,rcar-gen4-pcie";
> + reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>,
> + <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
> + <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>,
> + <0 0xfe000000 0 0x400000>;
> + reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config";
> + interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "msi", "dma", "sft_ce", "app";
> + clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
> + clock-names = "core", "ref";
> + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
> + resets = <&cpg 624>;
> + reset-names = "pwr";
> + max-link-speed = <4>;
> + num-lanes = <2>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>,
> + <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>;
> + dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 2 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 3 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 4 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>;
s/416/449 for all four lines.
> + snps,enable-cdm-check;
> + status = "disabled";
> + };
> +
> + pciec1: pcie@e65d8000 {
> + compatible = "renesas,r8a779g0-pcie",
> + "renesas,rcar-gen4-pcie";
> + reg = <0 0xe65d8000 0 0x1000>, <0 0xe65da000 0 0x0800>,
> + <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>,
> + <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>,
> + <0 0xee900000 0 0x400000>;
> + reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config";
> + interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "msi", "dma", "sft_ce", "app";
> + clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>;
> + clock-names = "core", "ref";
> + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
> + resets = <&cpg 625>;
> + reset-names = "pwr";
> + max-link-speed = <4>;
> + num-lanes = <2>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00400000>,
> + <0x02000000 0 0xc0000000 0 0xc0000000 0 0x10000000>;
> + dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 2 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 3 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 4 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>;
s/423/456 for all four lines.
> + snps,enable-cdm-check;
> + status = "disabled";
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
