From: Duy Nguyen <duy.nguyen.rh@xxxxxxxxxxx>
Support CPUIdle for ARM Cortex-A76 on R-Car V4M.
Signed-off-by: Duy Nguyen <duy.nguyen.rh@xxxxxxxxxxx>
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
index 88c5dcbc38d59dab..b3255bba69e3e6da 100644
--- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
@@ -42,6 +42,7 @@ a76_0: cpu@0 {
power-domains = <&sysc R8A779H0_PD_A1E0D0C0>;
next-level-cache = <&L3_CA76>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
};
a76_1: cpu@100 {
@@ -51,6 +52,7 @@ a76_1: cpu@100 {
power-domains = <&sysc R8A779H0_PD_A1E0D0C1>;
next-level-cache = <&L3_CA76>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
};
a76_2: cpu@200 {
@@ -60,6 +62,7 @@ a76_2: cpu@200 {
power-domains = <&sysc R8A779H0_PD_A1E0D0C2>;
next-level-cache = <&L3_CA76>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
};
a76_3: cpu@300 {
@@ -69,6 +72,20 @@ a76_3: cpu@300 {
power-domains = <&sysc R8A779H0_PD_A1E0D0C3>;
next-level-cache = <&L3_CA76>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0010000>;
+ local-timer-stop;
+ entry-latency-us = <400>;
+ exit-latency-us = <500>;
+ min-residency-us = <4000>;
+ };
};
L3_CA76: cache-controller {
--
2.34.1
