On Mon, Sep 25, 2023 at 09:34:16AM +0900, Yoshihiro Shimoda wrote: > From: Tam Nguyen <tam.nguyen.xa@xxxxxxxxxxx> > > Fix the MPIC.PSMCS value following the programming example in the > section 6.4.2 Management Data Clock (MDC) Setting, Ethernet MAC IP, > S4 Hardware User Manual Rev.1.00. > > The value is calculated by > MPIC.PSMCS = clk[MHz] / ((MDC frequency[MHz] + 1) * 2) > with the input clock frequency of 320MHz and MDC frequency of 2.5MHz. > Otherwise, this driver cannot communicate PHYs on the R-Car S4 Starter > Kit board. If you run this calculation backwards, what frequency does MPIC_PSMCS(0x3f) map to? Is 320MHz really fixed? For all silicon variants? Is it possible to do a clk_get_rate() on a clock to get the actual clock rate? Andrew
