For eg: here Adesto flash requires HI-Z for IO3 pin and Micron flash
requires setting "1" for IO3 pin for 4-bit mode to work.
That is odd. You'd need to ask Micron, but I assume it is because
IO3 is shared with hold# and reset#. And there is a note "For pin
configurations that share the DQ3 pin with RESET#, the RESET#
functionality is disabled in QIO-SPI mode". So I guess the reason
why they asking for a '1' is because they don't want to reset the
flash. I'm pretty sure, we don't really support this in linux, so
you'd probably want to disable that feature, i.e. see Table 7,
bit 4. You could also come around this by enabling a pull-up on
that line (assuming the SPI controller 'drives' HiZ during command
phase).
Oh and I forgot. You probably can do some kind of fixup (where you
set this bit) for this flash in drivers/mtd/spi-nor/micron.c.
-michael
