Hi Geert-san,
> From: Geert Uytterhoeven, Sent: Thursday, August 31, 2023 10:17 PM
>
> Hi Shimoda-san,
>
> On Fri, Aug 25, 2023 at 3:57 PM Yoshihiro Shimoda
> <yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> > Document bindings for Renesas R-Car Gen4 and R-Car S4-8 (R8A779F0)
> > PCIe endpoint module.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
> > Reviewed-by: Serge Semin <fancer.lancer@xxxxxxxxx>
> > Acked-by: Manivannan Sadhasivam <mani@xxxxxxxxxx>
>
> Thanks for your patch!
Thank you for your review!
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-ep.yaml
> > @@ -0,0 +1,106 @@
>
> > + resets:
> > + maxItems: 1
>
> Missing reset-names, cfr.
> Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
Oops! I'll add reset-names.
> > +required:
> > + - compatible
> > + - reg
> > + - reg-names
> > + - interrupts
> > + - resets
> > + - power-domains
> > + - clocks
> > + - clock-names
>
> Missing reset-names.
I'll add it.
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/power/r8a779f0-sysc.h>
> > +
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + pcie0_ep: pcie-ep@e65d0000 {
> > + compatible = "renesas,r8a779f0-pcie-ep", "renesas,rcar-gen4-pcie-ep";
> > + reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2800 0 0x0800>,
>
> <0 0xe65d2800 0 0x0800> does not match your DTS patch
<snip URL>
Oops. This example is not correct. I'll revise it.
>
> > + <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
> > + <0 0xe65d6200 0 0x0e00>, <0 0xfe000000 0 0x400000>;
> > + reg-names = "dbi", "dbi2", "atu", "dma", "app", "addr_space";
> > + interrupts = <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
>
> What about SPI 419, 420, 421?
These SPI interrupts cannot match the Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
Also, I cannot describe the detail of these SPI interrupts behavior because of the datasheet
doesn't mention the detail... So, I didn't describe them.
> > + interrupt-names = "dma", "sft_ce", "app";
> > + clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
> > + clock-names = "core", "ref";
> > + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> > + resets = <&cpg 624>;
> > + num-lanes = <2>;
> > + max-link-speed = <4>;
> > + max-functions = /bits/ 8 <2>;
> > + };
> > + };
>
> BTW, I think it would be good to make the order of the properties and
> in the example match between the host and endpoint bindings, to make
> the output of
> "diff Documentation/devicetree/bindings/pci/rcar-gen4-pci-{host,ep}.yaml"
> as small as possible.
Thank you for your suggestion! I'll revise the dt-bindings doc.
Best regards,
Yoshihiro Shimoda
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
