Hi Geert-san,
> From: Yoshihiro Shimoda, Sent: Friday, April 14, 2023 4:27 PM
>
> Add PCIe Host and Endpoint nodes for R-Car S4-8 (R8A779F0).
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 104 ++++++++++++++++++++++
> 1 file changed, 104 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
> index 1d5426e6293c..b3fe7e0599c3 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
> @@ -711,6 +711,110 @@ hscif3: serial@e66a0000 {
> status = "disabled";
> };
>
> + pciec0: pcie@e65d0000 {
> + compatible = "renesas,r8a779f0-pcie",
> + "renesas,rcar-gen4-pcie";
> + reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>,
> + <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
> + <0 0xe65d6200 0 0x1100>, <0 0xfe000000 0 0x400000>;
> + reg-names = "dbi", "dbi2", "atu", "dma", "app", "config";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x82000000 0 0x30000000 0 0x30000000 0 0x10000000>;
> + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
> + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "msi", "dma", "sft_ce", "app";
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 2 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 3 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 4 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 624>;
> + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> + resets = <&cpg 624>;
> + num-lanes = <2>;
> + snps,enable-cdm-check;
> + max-link-speed = <4>;
> + status = "disabled";
> + };
> +
> + pciec1: pcie@e65d8000 {
> + compatible = "renesas,r8a779f0-pcie",
> + "renesas,rcar-gen4-pcie";
> + reg = <0 0xe65d8000 0 0x1000>, <0 0xe65d8200 0 0x0800>,
I realized that the second "dbi2" address should be 0xe65da000, not 0xe65d8200.
> + <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>,
> + <0 0xe65de200 0 0x1100>, <0 0xee900000 0 0x400000>;
> + reg-names = "dbi", "dbi2", "atu", "dma", "app", "config";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + bus-range = <0x00 0xff>;
> + device_type = "pci";
> + ranges = <0x82000000 0 0xc0000000 0 0xc0000000 0 0x10000000>;
> + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
> + interrupts = <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "msi", "dma", "sft_ce", "app";
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 2 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 3 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 4 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 625>;
> + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> + resets = <&cpg 625>;
> + num-lanes = <2>;
> + snps,enable-cdm-check;
> + max-link-speed = <4>;
> + status = "disabled";
> + };
> +
> + pciec0_ep: pcie-ep@e65d0000 {
> + compatible = "renesas,r8a779f0-pcie-ep",
> + "renesas,rcar-gen4-pcie-ep";
> + reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2800 0 0x800>,
> + <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
> + <0 0xe65d6200 0 0x0e00>, <0 0xfe000000 0 0x400000>;
> + reg-names = "dbi", "dbi2", "atu", "dma", "app", "addr_space";
> + interrupts = <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "dma", "sft_ce", "app";
> + clocks = <&cpg CPG_MOD 624>;
> + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> + resets = <&cpg 624>;
> + num-lanes = <2>;
> + max-link-speed = <4>;
> + status = "disabled";
> + };
> +
> + pciec1_ep: pcie-ep@e65d8000 {
> + compatible = "renesas,r8a779f0-pcie-ep",
> + "renesas,rcar-gen4-pcie-ep";
> + reg = <0 0xe65d8000 0 0x2000>, <0 0xe65da800 0 0x0800>,
> + <0 0xe65dd000 0 0x1200>, <0 0xe65de200 0 0x0e00>,
> + <0 0xee900000 0 0x400000>;
I realized that missing the "dbi2" resource on the reg.
I'll fix them on v2.
Best regards,
Yoshihiro Shimoda
> + reg-names = "dbi", "dbi2", "atu", "dma", "app", "addr_space";
> + interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "dma", "sft_ce", "app";
> + clocks = <&cpg CPG_MOD 625>;
> + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> + resets = <&cpg 625>;
> + num-lanes = <2>;
> + max-link-speed = <4>;
> + status = "disabled";
> + };
> +
> ufs: ufs@e6860000 {
> compatible = "renesas,r8a779f0-ufs";
> reg = <0 0xe6860000 0 0x100>;
> --
> 2.25.1
