Mon, Mar 06, 2023 at 09:00:07AM +0000, Biju Das kirjoitti:
> The output pins of the RZ/G2L general PWM timer (GPT) can be disabled
> by using the port output enabling function for the GPT (POEG).
>
> Add basic support using s/w control through generic pincontrol sysfs to
> enable/disable output from GPT by registering with RZ/G2L pincontrol
> driver.
You have wrong Subject prefix.
...
> +static void rzg2l_poeg_write(struct rzg2l_poeg_chip *chip, u32 data)
> +{
> + iowrite32(data, chip->mmio);
> +}
> +
> +static u32 rzg2l_poeg_read(struct rzg2l_poeg_chip *chip)
> +{
> + return ioread32(chip->mmio);
> +}
Why not regmap MMIO?
...
> +static struct platform_driver rzg2l_poeg_driver = {
> + .driver = {
> + .name = "rzg2l-poeg",
> + .of_match_table = of_match_ptr(rzg2l_poeg_of_table),
Why do you need of_match_ptr()?
> + },
> + .probe = rzg2l_poeg_probe,
> + .remove = rzg2l_poeg_remove,
> +};
--
With Best Regards,
Andy Shevchenko
